Homework #3
(2/10/2004)
This homework is due on 2/17/05 at the beginning of class.
CSC270 Homework #3

Problem #1
Problems 1 and 2 are essentially repeated from class discussions, in order to reinforce
these fundamental circuits, with the additional step
of drawing out the detailed wiring diagrams to use in lab 3.
Using Karnaugh maps recreate the boolean equations representing a
binary adder recieving two inputs Ai and
Bi, along with a carry Ci (so there are really three inputs), and generating two outputs,
a Sum Si and a carry-out signal Ci+1.
Once you have the functions, draw the logic diagram of the circuit,
adding pin numbers and chip ID numbers. You will wire this up in Lab 3.
Also create the circuit, wiring diagram and block diagram for a 2-bit adder, i.e.
a circuit that will add two 2-bit numbers so
that you can add two bits to two other bits and get a 2-bit sum and one
carry out. Think carefully about how many inputs this circuit will have (and check the
text - there is a lot of information on adders in there).

Problem #2
Using the adder and the controlled inverter circuits from class, design
a binary subtractor circuit. Specifically, you want your circuit to subtract
Bi from Ai
when the cmd signal is 1, and add Bi to Ai
when the cmd signal is 0. Show the logic gate circuit, wiring diagram
and the steps you took to obtain it.

Problem #3
Problem 3-15 (a), using don't care conditions.

Problem #4
Problem 4-3. Note that this should be a quick problem, with the objective of
getting everyone starting to think about analyzing existing circuits, and deducing
their behavior. Section 4-2 will be a good review for part (a). If it seems to be
taking a while to figure it out, put it down for a bit and come back to it
later. The equations and size of the truth table can be deduced by simply
observing the circuit diagram (and following along with the steps in section 4-2
if they help).

Problem #5
This problem deals with the priority encoder. You can start working on it now, though
we will not discuss the final steps in the analysis until Tuesday, Feb. 15.
Assume that four peripherals, a mouse, a printer, a floppy drive, and
a hard disk generate interrupt signals that are fed to a processor.
The processor has only three inputs (because of pin limitation), and
receives an interrupt signal on its INT input, and two code bits, labeled
C0 and C1.
The four interrupt signals from the peripherals are fed to a circuit (priority
encoder, or PIC)
that outputs the three signals described above to the processor.
PIC
| +--------+
| | |
INT +-------------+ +--------- mouse
| | |
C0 +-------------+ +--------- printer
| | |
C1 +-------------+ +--------- floppy
| | |
| | +--------- hard disk
| | |
| +--------+
The PIC uses the rules below to generate INT, C0 and C1, responding to the interrupt signals it receives from
the four peripherals:
- When one or more interrupt signals are active (high), the INT signal
becomes active (high).
- If none of the peripherals are interrupting, then INT is low,
and so are C0 and C1.
- If the mouse is the only device interrupting, then INT is high,
and C0 and C1 are both low.
- If the printer is interrupting, and neither the floppy nor
the hard disk are interrupting,
then the PIC generates a high level on INT,
and sets C1 to 0, C0 to 1. The PIC ignores the mouse if the
printer is interrupting.
- If the floppy is interrupting, and the hard disk is not, then
the PIC sets the INT signal high, and sets C1 high and C0 low.
The PIC ignores the mouse and printer if the floppy is interrupting.
- Finally, if the hard disk is interrupting, then INT is set hight,
and C1 and C0 both high. The PIC ignores the mouse, printer
and floppy if the hard disk is interrupting.
Generate the truth tables for INT, C0 and C1.
Give the minterm canonical forms of INT, C0, and C1.
Implement the PIC with AND, OR and/or inverter gates.
