CSC270   HW #2

Problem #1.

Problem 3.5 on page 106 of the textbook, Digital Design, by Mano.

Problem #2.

Problem 3.21

Problem #3.

Assume that we want to add a circuit next to the majority voter that will have the same three input signals as the majority voter, but that has three outputs, called FAULT, ID0, and ID1.

Fault will be 0 when the three inputs are the same, and 1 if one of the inputs is different from the other two.

ID0, and ID1, will output the binary identity of the faulty input. We assume here that Input a has Id 00, Input b has Id 01, and Input c 10.

For example, if we have 011 on a, b, and c, then Fault will be 1 and ID0 ID1 will be 00, since a is the input that is different. If we have 001 on a, b, and c, then Fault will be 1 and ID0 ID1 will be 10, since this time c is different. If FAULT is 0 then ID0 and ID1 are both 1.

Your assignment is to show the logic diagrams for the circuit generating Fault and for the circuit generating ID0 and ID1. The first set of diagrams should show the circuits using AND, OR, inverter, and whatever other gates you need. Assume in this whole assignment that only 2-input gates are available. The second set of diagrams should contain only NAND gates.

Make sure that your second diagram is efficient. In particular, make sure you remove NAND gates that cancel each other out, and that if you use only one gate to generate a signal needed in several places. For example, if your first circuit generating Fault requires a-bar, and the second circuit generating ID0 and ID1 also needs a-bar, do not use two inverters. One is enough, and you feed its output to the two different circuits.

Show how you derive your answers (truth tables, equations, K-maps, etc.)

Draw your diagrams neatly, please! Do not hesitate to use whole pages to show simple diagrams. It makes it easy then to understand the logic used.